Azalia Mirhoseini

I am a Staff Research Scientist and manager at Google Brain, and an advisor at Cmorq. My research interests lie in the intersection of machine learning, systems and hardware. I have published more than 40 peer-reviewed papers at scientific venues such as Nature, NeurIPS, ICML, ICLR, UAI, ASPLOS, SIGMETRICS, DAC, DATE, and ICCAD. I am a co-founder/lead of Machine Learning for Systems Team at Google Brain, a larger research effort to automate and optimize the process of designing next generation computer systems and chips through advanced learning based methods. I have a Ph.D. in Computer Engineering from Rice University. I have received MIT Technology Review's 35 Innovators Under 35 Award, Best Ph.D. Thesis Award at Rice University, and a Gold Medal in the National Math Olympiad in Iran. My work has been covered in various media outlets, including MIT Technology Review, IEEE Spectrum, Times, CNBC, The Verge, and WIRED.


Recent Highlights:

  • Our work on deep reinforcement learning for chip floorplanning was published in Nature and used in production to design next generation Google TPUs, with potential to save thousands of hours of engineering effort for each next generaion. I cofounded/led this project, a larger team effort with 20+ engineers and researchers across different organizations, including Google Research and Platforms (Nature and Opinion Piece).

  • Developed FAST, a full-stack accelerator search framework with a broad design search space, including hardware datapath, software scheduling, and compiler passes such as operation fusion. When evaluated on vision and NLP benchmarks, custom designs generated by FAST show up to 6x improvement in Perf/TDP vs. TPU-v3. We also demonstrated that accelerators with 2x higher Perf/TCO can become ROI-positive at moderate datacenter deployments (ASPLOS'22).

  • Developed lossless accelerators using approximate multipliers for fast and energy-efficient inference on vision benchmarks (DATE’22).

  • Developed deep reinforcement learning algorithms to do model parallelism that speed up deep network training by more than 60% over top-performing baselines (ICML’17, ICLR’18, and NeurIPS’20).

  • Developed mixture-of-expert NLP models that allow efficient training of massive neural networks with over 100 billion parameters, yielding state of the art results on established language modeling and translations tasks (ICLR’17).

  • Publications:

    For a full list of publications, please take a look at my CV or Google Scholar page.


    Recent Talks and Interviews

  • Keynote speaker at CVPR workshop on Dynamic Neural Networks meets Computer Vision 2021 (Slides, Video)
  • Keynote speaker at the workshop on Graph Neural Networks and Systems at MLSys, 2021
  • Invited speaker at IPAM 2021 Workshop on Deep Learning and Combinatorial Optimization
  • Invited speaker at NVIDIA GTC, 2021 (Video)
  • Panelist at IEEE Custom Integrated Circuits Conference ML for Chip Design Forum, 2021
  • Keynote Speaker at MIT EmTech China, 2020
  • Keynote Speaker at Ray summit, 2020 (Video)
  • Keynote Speaker at Open Data Science Conference, 2020
  • Keynote Speaker at International Supercomputing ML day, 2019
  • Keynote Speaker at ML in HPC Workshop at Supercomputing, 2018
  • Interviewed by MIT Technology Review, 2020
  • Interviewed by IEEE Spectrum, 2020
  • Interviewed by ACM Learning Center, 2020 (Interview)
  • Interviewed by Towards Data Science, 2019 (Interview, Video)
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    Awards and Honors

  • Published in Nature Flagship Journal, 2021
  • MIT Technology Review 35 Innovators Under 35, 2019 (Article)
  • Best Thesis Award at Rice University, ECE Department, 2015
  • Fellowships and scholarships from Microsoft Research, IBM Research and Schlumberger, 2010-2015
  • Gold Medal in National Math Olympiad, Iran, 2004
  • >




    You can reach out by sending an email to: azalia (at) google.com.